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JunoTM 04 UR8HC007-004 Zero-PowerTM Input Device and Power Management IC
HID & SYSTEM MANAGEMENT PRODUCTS, H/PC IC FAMILY DESCRIPTION The JunoTM 04 is a member of a series of input device and power management companion ICs for RISC-based portable systems. On a single IC, the JunoTM 04 integrates control of any 4-wire or 8-wire resistive touch screen, keyboard scanning, unique power management capabilities, and plenty of General Purpose Input / Output (GPIO). The JunoTM 04 provides continuous operation between 3 and 5V and scans a fully programmable 8 X 16 keyboard matrix.The Zero-PowerTM JunoTM 04 will power down even between key presses. Typical power consumption is less than 1 A, a first for embedded ICs. The JunoTM 04 is equipped with Semtech's proprietary protocol developed specifically for RISCbased handheld machines. It interfaces the system via either Asynchronous Serial (UART) or the Serial Peripheral Interface (SPI). The integration of features, many of them programmable, on one IC increases flexibility and reduces component count and cost. FEATURES * Typically consumes less than 1A * Scans an 8 x 16 keyboard matrix that supports Japanese, English and European keyboards * Interfaces any four- or eight-wire resistive touch screen * Operates continuously between 3 Volts and 5 Volts * Offers unique power management capabilities that work in harmony with Windows(R) CE power modes * Always runs in "Stop" mode without data or event loss * GPIO pins provide interrupt at both falling and rising edge of signals, ideal for lid functions, power, ring indicators, docking signals, battery measurement, etc. APPLICATIONS * Jupiter-class devices * Professional H/PCs PIN ASSIGNMENTS
R2 R3 R4 R5 R6 R7 C0 C1 C2 C3 C4 C5 C6 C7 LEFT0/GIO60 LEFT1/GIO61 LEFT2/GIO62 LEFT3/GIO63 RIGHT0/GIO64 RIGHT1/GIO65
* Has additional GPIO available for LEDs, switches, etc. * Offers internal control of LCD brightness/contrast, audio, etc. as well as four 10-bit A/D channels for power management monitoring * Provides programmable features that allow for maximum design differentiation without customization * Cost-effective, reducing overall system costs by integrating features that would typically require multiple components * Available in 80-pin 13 x 13 mm, 1.7mm high package to accommodate slim designs
* H/PCs * Web Phones, G3 Terminals
60 61
R1 R0 BOT3/RIGHT BOT2/LEFT BOT1/BOT BOT0/TOP TOP3/RIGHTEN TOP2/LEFTEN TOP1/BOTEN TOP0/TOPEN VDD AVREF AVSS TOPAD BOTAD LEFTAD RIGHTAD C15 C14 GIO31/AD1
41 40
RIGHT2/GIO66 RIGHT3/GIO67 C8 C9 C10 C11 GIO00/LED0 GIO01/LED1 GIO02/LED2 GIO03/LED3 VSS OSCO OSCI C12 C13 RESET VSS1 LID PWROK MOSI/RXD
UR8HC007-004-FQ
80
GIO30/AD0 GIO43 GIO42/BLINKCANCEL GIO41/SW1/INT1 TOUCHINT HSUS DA1/PWM1/GIO51 DA0/PWM0/GIO50
21 1
GIO11 GIO10 ATN/CTS SCLK/ISEL MISO/TXD SS/RTS
20
Juno is a trademark of Semtech Corporation. All other trademarks belong to their respective companies.
Copyright @1998-2001 Semtech Corporation DOC8-007-004-DS-103
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ORDERING CODE
Package Options 80-pin, Plastic LQFP Other Materials Technical Reference Manual JunoTM 04 Eval. Kit Pitch in mm's 0.5 Type Document Evaluation Kit TA = 0 C to +75 C UR8HC007-004-XX-FQ Order number DOC8-007-004-TR-XXX EVK8-007-004-XXX
Note 1: XX= Optional for customization; XXX= Denotes revision number
BLOCK DIAGRAM
SCLK / ISEL MOSI/RxD MISO/TxD SS/RTS ATN/CTS
Dual Mode Serial Communications Port
HID Manager
Keyboard Matrix Scanner
ROW 0-7 COL 0-15
PWROK LID HSUS Power Management Unit
Configuration Status and Control Registers
TouchScreen Port / GIO60-7
21
2
Analog Outputs PWM0-1 D/A0-1 GIO50-1
2
Analog Inputs A/D0-1 (Shared with GIO3)
GPIO
GIO30-31 / A/D0-1 GIO00-03 / LED0-3 GIO10-11 GIO41-43 / SW / INT
2
4
2
3
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PIN DEFINITIONS
Pin Numbers Mnemonic Power Supply VDD AVREF AVSS VSS VSS1 Reset _RESET QFP 71 72 73 30 24 Type PWR AI PWR PWR PWR Name and Function Positive Supply Voltage Positive analog reference voltage Ground: analog signal Ground: negative supply voltage Auxiliary Ground; must be tied to pin 30 Controller hardware reset pin: when at Low-level, this pin holds the UR8HC007in a reset state. This pin must be held at a logic-low until Power Supply voltage (VDD) reaches the minimum operating level (2.7V). Oscillator input: connect ceramic resonator with built-in load capacitors or CMOS clock from external oscillator 4 MHz operating frequency Oscillator Output: connect ceramic resonator with built-in load capacitors or keep open if external oscillator is used
25
I
Oscillator pins OSCI
28
I
_OSCO
29
O
Scanned matrix pins ROW0-ROW7 COL0-COL7 COL8-COL11 COL12-COL13 COL14-COL15
62-55 54-47 38-35 27-26 79-78
I O
Row matrix outputs Column matrix outputs
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PIN DEFINITIONS, (CON'T)
Pin Numbers Mnemonic General Purpose Input/Ouput GIO0 GIO00/LED0-GIO3/LED3 GIO1 GIO10-GIO11 GIO3 - analog input GIO30/AD0 GIO31/AD1 GIO4 GIO41/SW1/INT1 QFP Type Name and Function
34-31
I/O
General purpose input/output pin LED driver General purpose input/output pin, General purpose input/output pin, A/D input 0 General purpose input/output pin, A/D input 1 General purpose input/output pin, switch Input. Capable of interrupt on both positive and negative edges General purpose input/output pin; negative input cancels all LED blinking, unless blink-cancel function disabled in register General purpose input/output pin D/A output (Range: AVSS to AVREF) D/A output (Range: AVSS to AVREF) If no hardware touchscreen driver, drive output to right side of touchscreen; otherwise general purpose I/O If no hardware touchscreen driver, drive output to right side of touchscreen; otherwise general purpose I/O If no hardware touchscreen driver, drive output to right side of touchscreen; otherwise general purpose I/O If no hardware touchscreen driver, drive output to right side of touchscreen; otherwise general purpose I/O If no hardware touchscreen driver, drive output to left side of touchscreen; otherwise general purpose I/O If no hardware touchscreen driver, drive output to left side of touchscreen; otherwise general purpose I/O If no hardware touchscreen driver, drive output to left side of touchscreen; otherwise general purpose I/O If no hardware touchscreen driver, drive output to left side of touchscreen; otherwise general purpose I/O
17-16 1 80
I/O I/O/Ai I/O/Ai
4
I/O, IInt
GIO42/_BLINKCANCEL
3
I/O
GIO43 GIO5 - analog output DA0/PWM0/GIO50 DA1/PWM1/GIO51 Touch Screen interface RIGHT3/GIO67
2 11 10 39
I/O Ao Ao I/O
RIGHT2/GIO66
40
I/O
RIGHT1/GIO65
41
I/O
RIGHT0/GIO64
42
I/O
LEFT3/GIO63
43
I/O
LEFT2/GIO62
44
I/O
LEFT1/GIO61
45
I/O
LEFT0/GIO60
46
I/O
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PIN DEFINITIONS, (CON'T)
Pin Numbers Mnemonic BOT3/RIGHT QFP 63 Type O Name and Function If no hardware touchscreen driver, drive output to bottom side of touchscreen; otherwise output for right side of touchscreen If no hardware touchscreen driver, drive output to bottom side of touchscreen; otherwise output for left side of touchscreen If no hardware touchscreen driver, drive output to bottom side of touchscreen; otherwise output for bottom side of touchscreen If no hardware touchscreen driver, drive output to bottom side of touchscreen; otherwise output for top side of touchscreen If no hardware touchscreen driver, drive output to top side of touchscreen; otherwise enable output to right side of touchscreen If no hardware touchscreen driver, drive output to top side of touchscreen; otherwise enable output to left side of touchscreen If no hardware touchscreen driver, drive output to top side of touchscreen; otherwise enable output to bottom side of touchscreen If no hardware touchscreen driver, drive output to top side of touchscreen; otherwise enable output to top side of touchscreen Touchscreen interrupt input A/D input from right side of touchscreen A/D input from left side of touchscreen A/D input from bottom side of touchscreen A/D input from top side of touchscreen
BOT2/LEFT
64
O
BOT1/BOT
65
O
BOT0/TOP
66
O
TOP3/_RIGHTEN
67
O
TOP2/_LEFTEN
68
O
TOP1/_BOTEN
69
O
TOP0/_TOPEN
70
O
_TOUCHINT RIGHTAD LEFTAD BOTAD TOPAD System and Power Management _LID
5 77 76 75 74
I Ai Ai Ai Ai
23
IInt
PWROK _HSUS
22 9
IInt I
Lid closed signal from the lid switch (active-low). Capable of interrupt on both positive and negative edges Power OK signal. Capable of interrupt on both positive and negative edges Host Suspended signal (active-low). When "Low," indicates that host computer system is in power-reduced or Stop mode.
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PIN DEFINITIONS, (CON'T)
Pin Numbers Mnemonic Host Communication Interface _SS/_RTS QFP Type Name and Function
13
I_Int
_ATN/_CTS
18
O
MISO/TXD
20
I/O / O
MOSI/RXD SCLK/_ISEL
21 19
I I
Slave_Select (SPI Mode) or Ready_To_Send (Asynchronous Serial Mode). Active-Low signal Input. Low-level indicates that the Host System has data for the UR8HC007 peripheral device or the Host System is ready to accept data from the UR8HC007 peripheral device. Capable of Interrupt on Negative edge. Pin 60 and pin 18 should both be "Low" for data exchange to occur. Attention (SPI Mode) or Clear_To_Send (Asynchronous Serial Mode ). Active-Low signal Output. Low-level indicates that the UR8HC007 peripheral device has data for the Host System or the UR8HC007 peripheral device is ready to accept data from the Host System. Pin 18 and pin 60 should both be "Low" for data exchange to occur. Master-In-Slave-Out (SPI Mode) or Transmit Data (Asynchronous Serial Mode, Idle = "High" = 1) Master-Out-Slave-In (SPI Mode) or Receive Data (Asynchronous Serial Mode) Serial Clock (SPI Mode) or Interface Select (Asynchronous Serial Mode). Tie "Low" to select Asynchronous Serial Mode. In SPI Mode, use the following Clock sequence: Idle-High / Negative-Edge (Shift Data) \ Positive-Edge (Latch Data), Idle-High.
Note 2: An underscore before a pin mnemonic denotes an active low signal. Pin Types Legend: PWR= Power; Ai=Analog Input; Ao= Analog Output; I=Digital Input; I_Int=Digital Input capable of generating interrupts on a positive to negative edge transition; IInt=Digital Input capable of generating interrupts on either a positive or a negative edge transition of the input signal; Ipup= Digital Input with built-in Pull-up to VDD; O=Output; pD= p-channel open Drain Output (switch to VDD); I/O=Input or Output (Bidirectional pin); nD= nchannel open Drain Output (switch to VSS); 15V= 5 Volt tolerant input (even if VDD is less than 5V); nD5V=5 Volt tolerant n-channel open Drain Output.
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JUNOTM FAMILY COMMUNICATIONS INTERFACE The JunoTM family of controllers implements two modes of serial communications: The "Synchronous Peripheral Interface" (SPI) mode and the "Asynchronous Serial Interface" (ASI). The SPI is a synchronous bidirectional, multi-slave interface that supports bit rates up to 500 Kb/s. Several Hosts and companion chips implement the SPI protocol in order to communicate with a wide range of peripherals such as EEPROMs, A/D converters, MCUs and other system components. Alternatively, the SPI may be implemented through software on the Host side. The JunoTM family implements the _ATN as an additional hand-shake signal in order to support low power operation of the bus. The ASI is an asynchronous interface (UART type) that operates at a fixed baud rate of 62.5 Kb/s. Both interfaces are implemented through the same set of four pins. The IC determines the mode of communication with the Host during power-up by reading the value of the SCLK/ISEL pin. If the pin is tied low, the ASI mode is enabled. If it is high, the SPI interface is enabled. Please refer to the JunoTM 04 Technical Reference Manual for a description of handshake and critical timing parameters for each interface.
Host
CTS CTS
The diagrams below describe the SPI and ASI communications interfaces, respectively.
SPI Communications Interface
MOSI MISO
Host (master)
SCLK _SS _ATN _SS
USAR JunoTM (slave)
SLAVE 2
ASI Communications Interface
UR8HC007
RTS
RTS
RxD
RxD
TxD
TxD
ISEL
GND
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PROTOCOLS, COMMANDS AND REPORTS
Overview
The JunoTM UR8HC007-004 implements and supports four types of transaction messages. 1. Commands from the IC to the Host system 2. Commands from the Host system to the IC 3. Human Input Device (HID) reports to the system 4. Event Alert messages to the system The protocol is fundamentally implemented through a set of general packet commands that allow handling and reporting of each individual controller register and each bit within each register. In this manner, the system achieves maximum flexibility in manipulating the operation of the UR8HC007-004 controller.
General Message Structure
Communications between the JunoTM UR8HC007-004 and the Host processor are implemented using a set of packet protocols and commands. The general structure of a message is shown in the following diagram:
Protocol Header Command/Report Identifier Message Body (if applicable)
LRC
General Message Format
The Protocol Header identifies the type of transaction. The following table lists the available protocols. Protocol Headers
Protocols used in commands issued by the Host Protocol Simple Commands Write Register bit Read Register bit Write Register Read Register Write Block Read Block Protocols used in responses, reports and alerts issued by the controller Protocol Simple Commands Report Register bit & Event Alerts Report Register Report Block Relative Pointer Data Report Keyboard PS/2 Code Data Report Absolute Pointer Data Report Keyboard Key Code (position) Report
Header 80H 81H 82H 83H 84H 85H 86H
Header 80H 81H 83H 85H 87H 88H 89H 8AH
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PROTOCOLS, COMMANDS AND REPORTS (CON'T)
HID Data Report
The Pointing Device Data Reports format covers both absolute (where applicable) and relative positioning devices.
General Commands Format
For protocols used by either the host or the UR8HC007, a set of simple commands is implemented. These support the basic communication protocol and handle reset and errors in transmission. A simple command would have the following structure:
Keyboard Data Report
The Keyboard Data Reports return changes on the keyboard matrix or the External PS/2 keyboard device. The report ibncludes a make or break bit, a column number, and a row number.
Header (80H) Command Code LRC
Simple Command Structure
Following is a summary of the simple commands used by both the Host and the UR8HC007-004: Simple Commands Summary
Command Initialize Initialization Complete Resend Request Protocol Simple Simple Simple Cmd Code 20H 21H 25H Description Forces the recipient to enter the known default power-on state Issued as a hand-shake response only to the "Initialize" command. Issued upon error in the reception of a package. The recipient will resend the last transmitted packet
LRC (Longitudinal Redundancy Check)
The LRC is calculated for the whole packet, including the Protocol Header. The LRC is calculated by first taking the bitwise exclusive OR of all bytes from the message. If the most significant bit (MSB) of the LRC is set, the LRC is modified by clearing the MSB and changing the state of the next most significant bit. Thus, the Packet Check Byte will never consist of a valid LRC with the most significant bit set.
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REGISTERS The JunoTM 04 implements a set of internal registers that can be used to control and monitor the operation of the various functional units of the controller IC. These registers can be accessed through the Read/Write Register commands described in the Commands section of the JunoTM 04 Technical Reference Manual. The register architecture of the JunoTM 04 allows for maximum flexibility and expandability of the controller operation. At the same time, by using the default values for each register, a system can utilize all the basic functionality of the IC controller with minimum Host driver intervention. Registers' Page Organization
Register Offset 00 01
Registers' Page 0 0
255 Page Number Register Register Offset 00 01 Control and Status Registers
Page Number Register
1
Registers' Page 1
Scanned Matrix and Alternate Layout Keys Registers
255
Page Number Register
Figure 1: Registers' Page Organization
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POWER MANAGEMENT MODES OF OPERATION The Juno family has three modes of operation relating to its power consumption.
TM
POWER MANAGEMENT The JunoTM UR8HC007 family of controllers implements two power management methods: system-coordinated power management and Self-Power ManagementTM (SPM). System-coordinated power management primarily determines the tasks performed and the type of reports communicated to the Host. The JunoTM 04 monitors the system states through the PWROK (Power OK), _LID (Lid closed) and _HSUS (Host suspended) lines. In addition to these signal inputs, the UR8HC007 family provides a set of registers, described in the "Registers" chapter of the JunoTM 04 Technical Reference Manual, that can be used by the host to control the PM-related performance of the controller through software. According to the status of these lines (or register settings), the JunoTM 04 will enable or disable specific tasks and reports suited to the current power and system management state of the Host. Self-Power ManagementTM describes a method implemented by the JunoTM family of controllers that, independently of any system intervention, results in the lowest power consumption possible within the given parameters of its operation. Through Self-Power ManagementTM, the JunoTM controllers are capable of typically operating at only 1 A, independent of the state of the system. Self-Power ManagementTM primarily determines the actual power consumption of the controller IC. The JunoTM 04 implements the Semtech-patented Self-Power ManagementTM method to achieve the minimum power consumption possible, independent of the Host power management state. Even when the Host is in the active state, the IC can still operate most of the time at only 1 A, even with external PS/2 devices attached to it.
Critical Suspend
The "Stop" mode is the lowest power consumption mode. In this mode, the crystal is stopped and the IC consumes only 1 A of leakage current. This is the default mode to which the IC will revert any time an event or a signal condition does not force it to exit this mode. The "Wait" mode is entered each time it is necessary for a timer to be running in order to perform a system function. Such functions include the LED blinking mode and the use of one of the PWM channels. Typical power consumption in this mode is several hundred As. The "Run" mode is entered briefly, only to process an event or while an interrupt-generating signal condition persists. The controller IC will remain in this mode only for as long a signal prohibits it from reentering a lower power consumption mode or for as long as it is necessary to process a Host-related transaction (a few milliseconds).
PWROK=0
PWROK=1 AND _LID=0
PWROK=1 AND _LID=1 AND _HSUS=1
PWROK=0 PWROK=1 AND _LID=1 AND _HSUS=0
PWROK=0
PWROK=1 AND _LID=0
Lid Closed*
PWROK=1 AND _LID=1 AND _HSUS=1
PWROK=1 AND _LID=1 AND _HSUS=0
PWROK=1 AND _LID=0
Host Suspend
PWROK=1 AND _LID=1 AND _HSUS=1
SPM
PWROK=1 AND _LID=1 AND _HSUS=0
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HID MANAGER The UR8HC007-004 Human Input Device (HID) Manager is responsible for the configuration and handling of HID devices that are embedded or attached to the controller. The HID Manager has the following responsibilities: 1. Enabling and disabling embedded and attached input devices through the "HID enable/disable control" register 2. Formatting and relaying input device reports to the Host 3. Controlling the configuration and operation of both embedded and attached input devices The HID Manager consists of the two functional blocks: the Keyboard Manager and the Pointing Device Manager. The function of each Manager is explained in full in the JunoTM 04 Technical Reference Manual. OTHER JUNOTM SERIES MEMBERS Other members of the JunoTM series of companion ICs offers advanced, ergonomic control of an internal pointing device. Enabled pointing devices include touch pads or force sticks. If the application requires an internal pointing device, using a pointing-enabled JunoTM will eliminate the need for a dedicated mouse encoder IC.
KEYBOARD ENCODING The UR8HC007-004 will encode an 8-row by 16-column keyboard matrix. OEMs may reprogram the matrix by sending commands to the IC from the system. The JunoTM 04 supports English, Japanese and European keyboards. In addition, the IC supports both sticky keys and notebook-style keyboards. The keyboard below, the Fujitsu FKB7654, is the default keyboard for the UR8HC007-004.
E sc F1 F2 F3 F4 F5 F6 F7 F8 F9 F1 0 F1 1 F1 2
SL NL Pa u Br k Ins Prt D el Srq
! 1 t ab cap l ock shi f t ct rl Q
@ 2 W A Z
# 3 E S X
$ 4 R D C
% 5 T F V
^ 6 Y G B
& 7
7
* 8 U
4
8
( 9 I
5
9
) 0 O
6
_ P
3
+ = { [ } ]
~
bk sp e n te r
H N
J
1
K M
0
2
L < , alt
: ; > .
.
+
" ' ? /
/
| \ s h ift
fn
alt
sZ c e pa
c trl
pgup
pgup pgup pgup
Fujitsu FKB7654
GENERAL PURPOSE INPUT OUTPUT The JunoTM 04 provides many GPIO pins which enable OEMs to easily differentiate their products. Four GPIO ports provide interrupt at both falling and rising edge of signals. Two of these pins are dedicated for use as a Lid indicator and Digital power monitor. The other two may be used for a ring indicator, docking signal, soft power button, etc. Three GPIO pins provide A/D input and are ideal for battery measurement. Three GPIO pins provide two Pulse Width Modulation (PWM) channels and one D/A channel and may be used for analog control functions such as LCD brightness/contrast or audio volume control. Four GPIO pins with high drive ability are set aside as LED drivers or I/O. Eight GPIO pins can be used as system control outputs or inputs, for example, for switches.
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JUNOTM 04 POINTING DEVICE MANAGER The JunoTM 04 Pointing Device Manager has the following features:
Pin drive or device drive detection
The designer can select one of two configurations for touchscreen driving: with hardware driver (device drive) and without (pin drive). The JunoTM 04 can detect the configuration automatically at power-up and behave properly for that configuration. The touch and motion qualities are exactly the same for both configurations. For more details, see the analytical pin descriptions for touchscreen in the "Pin information" chapter.
Touch detection
The Pointing Device Manager periodically checks whether there is touch on touchscreen. If no touch is detected, the pointing device manager drives the touchscreen into power saving mode. If a touch is detected, touchscreen is forced into driving state and prepared for measurement.
Touch measurement
When the Pointing Device Manager detects a touch on touchscreen, it drives the touchscreen into drive state and does measurement. If the touch data is not good enough, the measured data are not used for the algorithm. Only good touch data are used for the algorithm.
Touch algorithm
Due to hand shaking and electrical noise, the raw data can not be output directly. The Pointing Device Manager uses a proprietary algorithm to process the data.
Sampling rate
The sampling rate is 100 coordinate points per second.
Resolution
The maximum touchscreen resolution is approximately 1000 points per direction. It varies with different touchscreens due to voltage drop on connection wires.
Touchscreens from different manufacturers
Touchscreens from different manufacturers have different parameters. The touchscreen parameters also depend on the size of touchscreen and material from which it is made. Because the Pointing Device Manager takes these properties into account, it can support almost any touchscreen.
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Copyright (c)1998-2001 Semtech Corporation DOC8-007-004-DS-103
+3V
SAMPLE SCHEMATIC FOR THE JUNOTM WITH TOUCHSCREEN DRIVER
10
RN1 C1
0.01F 0.01F 8 6 4 10k 7 5 3 1
+3V
R4
100k
C2 C3
TS_SENSOR_TOP TS_SENSOR_BOTTOM TS_SENSOR_LEFT TS_SENSOR_RIGHT
3 6
4-wire TouchScreen Sensor Interface
0.01F
2
C4
0.01uF 1
U5A
74LCX125
4
U5B
74LCX125
GP I/O
31 32 33 34 GIO03/LED3 GIO02/LED2 GIO01/LED1 GIO00/LED0 16 17 GIO11 GIO10 77 76 75 74 RIGHTAD LEFTAD BOTAD TOPAD 2 3 4 GIO43 GIO42/BLINKCANCEL GIO41/SW1/INT1
GP I/O
39 40 41 42 43 44 45 46 63 64 65 66 67 68 69 70 5 RIGHT3/GIO67 RIGHT2/GIO66 RIGHT1/GIO65 RIGHT0/GIO64 LEFT3/GIO63 LEFT2/GIO62 LEFT1/GIO61 LEFT0/GIO60 BOT3/RIGHT BOT2/LEFT BOT1/BOT BOT0/TOP TOP3/RIGHTEN TOP2/LEFTEN TOP1/BOTEN TOP0/TOPEN TOUCHINT
2
5
14
+3V
72
AVREF AVSS
C5
.1uF
73
11 10
D/A, A/D, GP I/O
DA0/PW M0/GIO50 DA1/PW M1/GIO51 AD0/GIO30 AD1/GIO31
1 80
UR8HC007-004-FQ
71
C15 C14 C13 C12 C11 C10 C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 R7 R6 R5 R4 R3 R2 R1 R0
78 79 26 27 35 36 37 38 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62
11
8
10
U5C
74LCX125
13
U5D
74LCX125
9
12
8x16 Keyboard Matrix
R3
100k
C6 +
10uF
C7
.1uF 24 30
VDD VSS1 VSS
System & PWR Management Host Interface
23 22 9 18 13 21 20 19
LID >>> PWROK >>> HSUS >>> ATN/CTS <<< SS/RTS >>> MOSI/RXD >>> MISO/TXD <<< SCLK/ISEL RESET 25 OSCO OSCI 28
29
+3V 2
U2
T C54VC2702ECB VIN
nRESET
Y1
4.00MHz
VOUT
1
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VSS 3
Copyright 2000 Semtech Corp. All rights reserved.
Copyright (c)1998-2001 Semtech Corporation DOC8-007-004-DS-103
+3V
SAMPLE SCHEMATIC FOR THE JUNOTM WITHOUT THE TOUCH SCREEN DRIVE
0.01F 0.01F
C1
RN1
8 6 4 7 5 3 1 10k
C2
TS_SENSOR_TOP TS_SENSOR_BOTTOM TS_SENSOR_LEFT TS_SENSOR_RIGHT
4-wire TouchScreen Sensor Interface
0.01F 0.01F
C3
2
C4
GP I/O
39 40 41 42 43 44 45 46 63 64 65 66 67 68 69 70 5 77 76 75 74 16 17 31 32 33 34 2 3 4
15
C5
.1uF
RIGHT3/GIO67 RIGHT2/GIO66 RIGHT1/GIO65 RIGHT0/GIO64 LEFT3/GIO63 LEFT2/GIO62 LEFT1/GIO61 LEFT0/GIO60 BOT3/RIGHT BOT2/LEFT BOT1/BOT BOT0/TOP TOP3/RIGHTEN TOP2/LEFTEN TOP1/BOTEN TOP0/TOPEN TOUCHINT
RIGHTAD LEFTAD BOTAD TOPAD
GIO43 GIO42/BLINKCANCEL GIO41/SW1/INT1
GIO11 GIO10
GIO03/LED3 GIO02/LED2 GIO01/LED1 GIO00/LED0
72 73
AVREF AVSS
11 10
D/A, A/D, GP I/O
DA0/PW M0/GIO50 DA1/PW M1/GIO51 AD0/GIO30 AD1/GIO31
1 80
+3V 71
UR8HC007-004-FQ
C7
.1uF 24 30 VDD VSS1 VSS
C15 C14 C13 C12 C11 C10 C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 R7 R6 R5 R4 R3 R2 R1 R0
78 79 26 27 35 36 37 38 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62
8x16 Keyboard Matrix
C6 +
10uF
System & PWR Management Host Interface
23 22 9 18 13 21 20 19
LID >>> PWROK >>> HSUS >>> ATN/CTS <<< SS/RTS >>> MOSI/RXD >>> MISO/TXD <<< SCLK/ISEL RESET OSCO OSCI
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29
28
25
+3V 2
U2
T C54VC2702ECB VIN
nRESET
Y1
4.00MHz
VOUT
1
VSS 3
Copyright 2000, Semtech Corp. All rights reserved.
JUNOTM 04 ELECTRICAL CHARACTERISTICS
Absolute maximum ratings (VSS = 0V, Ambient Temperature TA is in the range TLOW to THIGH) Parameter Symbol Value Supply Voltage VDD -0.3 to +7.0 Input voltage -0.3 to VDD+0.3 All pins except 2-9 VIN Pins 2-9 (PS/2 ports XXXDAT, XXXCLK, GIO16/SW16, GIO17/SW17) VIN -0.3 to +5.8 Output current Total peak for all pins IOH (Peak) -80 80 IOL (Peak) Total average for all pins IOH (Avg) -40 IOL (Avg) 40 All pins except 31-34 -10 Peak for each pin IOH (Peak) IOL (Peak) 10 -5 Average for each pin IOH (Avg) IOL (Avg) 5 Pins 31-34 (GIO00/LED0 - GIO03/LED3) Peak for each pin IOH (Peak) -10 IOL (Peak) 20 Average for each pin IOH (Avg) -5 IOL (Avg) 15 Temperature range Operating Temperature TLOW to THIGH -20 to 85 -40 to 125 Storage Temperature TSTG
Unit V V
V
mA mA
mA mA
mA mA C C
Copyright (c)1998-2001 Semtech Corporation DOC8-007-004-DS-103
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POWER CONSUMPTION WHILE OPERATING THE PWM CHANNELS Users should consider the built-in PWM channels for generating slowly changing DC control voltages. Since continuous clocking is necessary for the PWM operations, the only penalty for using the built-in PWM channels is the requirement for the chip to operate at least in the Reduced Power Mode, with typical Current Consumption of 750 A. NOTES FOR ELECTRICALS JUNOTM 04 ELECTRICAL CHARACTERISTICS, (CON'T)
Recommended Operating Conditions, Digital Section (VSS = 0V, Ambient Temperature TA is in the range TLOW to THIGH) Parameter Symbol Min Typ Max 2.7 3.0 5.5 Supply voltage VDD Input logic high voltage All pins except 2-9 VIH 0.8VDD VDD Pins 2-9 (PS/2 ports xxxDAT, xxxCLK, GIO16/SW16, 5.5 0.8VDD GIO17/SW17) VIH Input logic low voltage All pins except 28 VIL 0 0.2VDD 0 0.16VDD Pin 28 (OSCI) VIL Input current -5.0 0 5.0 IIL / IIL VI = VSS, VDD) Input Pull-up Current (pins 56-58 / IP6-IP8, IPUP -120 -10 VI = VSS) Output voltage IOH = -1.0 mA VOH VDD-1.0 0.4 VOL IOL = 1.6 mA Current Consumption (see Note 3 below) Full Speed Mode 3.5 7.0 (Fosc=4MHz) IDD Reduced Power Mode (Fosc=4MHz) IDD 750 Stop Mode (Interrupts active, Fosc=0) 1.0 (TA = 25C) IDD .1 10(TA = 85C ) Recommended operating conditions, analog section (VSS = 0V, Ambient Temperature TA is in the range TLOW to THIGH) Parameter Symbol Min Typ Max Analog Signal Ground AVSS 0 2.7 VDD VDD Analog Reference Voltage AVREF A/D Resolution 10 A/D Absolute Accuracy 4 A/D Analog Input Voltage Range VIA AVSS AVREF A/D Analog Input Current IIA 5.0 Analog Reference Current (see Note 4) (A/D is active) IAVREF 200 D/A Resolution 8 D/A Absolute Accuracy 2.5 1 2.5 4.0 D/A Output Impedance RO Analog Reference Current (see Note 5) (D/A is active, 3.2 Output = Full Scale) IAVREF Note 3: please see left Note 4: please see left Note 5: please see left
Copyright (c)1998-2001 Semtech Corporation DOC8-007-004-DS-103
Note 3:
Current Consumption values do not include any loading on the Output pins or Analog Reference Current for the built-in A/D or D/A modules.
Unit V
V
Note 4:
Since the built-in A/D module consumes current only during short periods of time (when A/D conversion is actually requested), the Analog Reference Current for the built-in A/D module is not a significant contributor to the overall power consumption.
V
V V A
A V V
Note 5:
The Analog Reference Current for the built-in D/A module correlates linearly to the Output Voltage. For D/A output of 0V, the Analog Reference Current is null. For D/A outputs approaching Full Scale (AVREF), the maximum Analog Reference Current is indicated in this Table. This current is a significant contributor to the overall power consumption.
mA A
A
Unit V V Bits LSb V A
A Bits % KOhms
mA
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MECHANICAL INFORMATION FOR THE UR8HC007-004 LQFP PACKAGE
HD D
80 61
1
60
80 Pin LQFP
20
41
HE
E
A
21 40
L1 F e
A2
A1
L Detail F
b y
Symbol MD e A A1 A2 b c D E e HD HE L L1 y b2 I2 MD ME
I2 Recommended Mount Pad
Dimension in Millimeters Min Nom Max - - 1.7 0.1 0.2 0 - - 1.4 0.13 0.18 0.28 0.105 0.125 0.175 11.9 12.0 12.1 11.9 12.0 12.1 - 0.5 - 13.8 14.0 14.2 13.8 14.0 14.2 0.3 0.5 0.7 1.0 - - - - 0.1 - 0 10 - - 0.225 - - 1.0 - - 12.4 - - 12.4
b2
Copyright (c)1998-2001 Semtech Corporation DOC8-007-004-DS-103
18
ME
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c
JUNOTM 04 BILL OF MATERIALS FOR PAGE 13 SCHEMATIC
UR8HC007-004-FQ BOM Description Quantity Capacitors: C1-C4 4 C2,C3,C4 3 C6 1 C5A,C5B,C5C 3 ICs: U4 1 U3 1 U1 1 Resistors: R2 1 R1 1 R3 1 R4,R5 2 Resonator: Y1 1 Transistor: Q1 1 Manufacturer Generic Generic Generic Generic National Generic Semtech Generic Generic Generic Generic AVX Zetex Part# Any Any Any Any LMV321M5 74HC4053 UR8HC007-004-FQ Any Any Any Any PBRC-4.00BR BSS84ZXCT Description 100pF, 5%, Ceramic, NPO or X7R .1uF, 10%, Ceramic, X7R or Z5U 1uF, 10V, +80%/-20%, Tantalum 10uF, 10V, +80%/-20%, Tantalum Single OpAmp, Low Voltage, SOT23-5 Tri 2-ch Analog Mux JunoTM Controller 1k, 5%, 1/16W 2.7k, 5%, 1/16W 3.16k, 1%, 1/16W 100k, 5%, 1/16W 4.00MHz Ceramic Resonator w/ Caps, SMT MOSFET_P Transistor, SMT, SOT-23
Copyright (c)1998-2001 Semtech Corporation DOC8-007-004-DS-103
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For sales information and product literature, contact: HID & System Mgmt Division Semtech Corporation 568 Broadway New York, NY 10012 usar@semtech.com http://www.semtech.com 212 226 2042 Telephone 212 226 3215 Telefax
Semtech Western Regional Sales 805-498-2111 Telephone 805-498-3804 Telefax Semtech Central Regional Sales 972-437-0380 Telephone 972-437-0381 Telefax Semtech Eastern Regional Sales 203-964-1766 Telephone 203-964-1755 Telefax Semtech Asia-Pacific Sales Office +886-2-2748-3380 Telephone +886-2-2748-3390 Telefax Semtech Japan Sales Office +81-45-948-5925 Telephone +81-45-948-5930 Telefax Semtech Korea Sales Sales +82-2-527-4377 Telephone +82-2-527-4376 Telefax Northern European Sales Office +44 (0)2380-769008 Telephone +44 (0)2380-768612 Telefax Southern European Sales Office +33 (0)1 69-28-22-00 Telephone +33 (0)1 69-28-12-98 Telefax Central European Sales Office +49 (0)8161 140 123 Telephone +49 (0)8161 140 124 Telefax
Copyright (c)1998-2001 Semtech Corporation. All rights reserved. Junoand Zero-Power are trademarks of Semtech Corporation. Semtech is a registered trademark of Semtech Corporation. All other trademarks belong to their respective companies. INTELLECTUAL PROPERTY DISCLAIMER This specification is provided "as is" with no warranties whatsoever including any warranty of merchantability, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification or sample. A license is hereby granted to reproduce and distribute this specification for internal use only. No other license, expressed or implied to any other intellectual property rights is granted or intended hereby. Authors of this specification disclaim any liability, including liability for infringement of proprietary rights, relating to the implementation of information in this specification. Authors of this specification also do not warrant or represent that such implementation(s) will not infringe such rights.
Copyright (c)1998-2001 Semtech Corporation DOC8-007-004-DS-103
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